1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly relates to a semiconductor device, which employs an interlayer insulating film of a low mechanical strength and a low dielectric constant, and has a highly reliable metal pad, as well as a method of manufacturing the same.
2. Description of the Background Art
In system LSIs in and after 0.18-micron generation, it is important to reduce signal delays in devices for achieving fast operations. The signal delay in the device is represented by a sum of a signal delay in a transistor and an interconnection delay, and the influence by the interconnection delay has been increasing with rapid reduction in interconnection pitch, as compared with the signal delay in the transistor. Since the interconnection delay is proportional to a product (R×C) of a resistance (R) and an interlayer capacitance (C), lowering of the interconnection resistance or reduction of the capacitance of the interlayer insulating film can effectively reduce the interconnection delay. For overcoming a problem of the signal delay, an embedded interconnection structure, in which an interlayer insulating film of a low dielectric constant and a copper interconnection are combined, has been actively studied.
A metal pad and its surrounding portion generally have a layer structure, in which a pad of aluminum or alloy of aluminum and copper is arranged at an uppermost layer for wire bonding, and is supported by a pad of a copper interconnection and a bear-plug both arranged under the pad of the aluminum or the alloy of aluminum and copper. This special structure of the metal pad and the portion surrounding it is disclosed in “High Performance Copper and Low-k Interconnect Technology Fully Compatible to 90 nm-node SOC application (CMOS4)”, M. Inohara et al., Technical Digest of 2002 IEDM, pp. 77–80.
As described above, it has been actively studied to employ the interlayer insulating film of a low dielectric constant into a leading-edge system LSI for lowering the interconnection delay. As such a material of a low dielectric constant, it is possible to employ materials, which are formed of a spin coating method, such as hydrogen silsesquiooxane, methyl silsesquioxane, poly-arylether, polyphenylene polymer, benzocyclobutene, polytetrafluoroethylene and porous silica (e.g., xerogel or aerogel) as well as materials, which are formed of a CVD (Chemical Vapor Deposition) method, such as a fluorine-doped silicon oxide film (SiOF film), fluorine-doped amorphous carbon film (CF film), parylene and carbon-doped silicon oxide film (SiOC film).
The foregoing materials have a much smaller mechanical strength than conventional silicon oxide films. The following table 1 represents a result of comparison of a hardness and an elastic modulus between a silicon oxide film and a SiOC film used in a typical interlayer insulating film of a low dielectric constant.
TABLE 1HardnessElastic ModulusSiO film (not low elastic modulus)9 (GPa)70–100 (GPa)SiOC film (low elastic modulus)2 (GPa)13 (GPa)
According to the table 1, the hardness and elastic modulus of the SiOC film having a low dielectric constant are much lower than those of the conventional silicon oxide film. In the following description, the lowering of the hardness and the lowering of the elastic modulus will be generally referred to as “lowering of a mechanical strength”.
Due to the lowering of mechanical strength of the interlayer insulating film, a crack may occur in the interlayer insulating film arranged in the layer under the metal pad, or a junction failure may occur in wire-bond when probing is executed for wire bonding or device test. Therefore, many proposals have been made for increasing reliability of the metal pad and its surrounding portion, e.g., in Japanese Patent Laying-Open Nos. 2000-340569, 2000-183104 and 2001-308100.